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Υλοποίηση σε αναδιατασσόμενη λογική συστήματος πρόγνωσης εξέλιξης όγκου

Malavazos Konstantinos

Πλήρης Εγγραφή


URI: http://purl.tuc.gr/dl/dias/02E4CAF2-A8AD-4804-A044-0627A7B0ED17
Έτος 2018
Τύπος Μεταπτυχιακή Διατριβή
Άδεια Χρήσης
Λεπτομέρειες
Εμφανίζεται στις Συλλογές

Περίληψη

In the last few years, the biomedical community is increasingly taking advantage of the increasing computational power, both to manage and analyze data and to model biological processes. Biomedical software applications usually require significant computational power, especially when they include the processing and analysis of large amounts of data, such as medical image sequences. This Master Thesis targets the acceleration of three different mathematical models, which are developed in the Technical University of Crete to model and predict the spatio-temporal evolution of glioma, using Reconfigurable Logic. Glioma is a rapidly evolving type of brain cancer, well known for its aggressive and diffusive behavior. The modeling applications presented in this Thesis fall under the category of multi-compartmental continuum approaches and aim to simulate the spatio-temporal evolution of a glioma tumor in an isotropic and heterogeneous brain tissue, which consists of different anatomic structures. The first model is the Oxygen-Glucose Diffusion-Proliferation 2D Model, simulating the proliferative cells and the necrotic core as a result of hypoxic and hypoglycemic-cells death, in single MRI images. The second is the Simple Diffusion-Proliferation 3D Model, which simulates only the proliferative cells in a sequence of MRI slices. The last is the Oxygen-Glucose Diffusion-Proliferation 3D Model, which simulates the same behaviors of the glioma as the 2D Model, in a sequence of MRI slices. The hardware acceleration is achieved using the Trenz platform, model TE0808 UltraSOM, which consists of a Xilinx Zynq UltraScale+ FPGA and an ARM Cortex A-53. The FPGA implementations of these Models are compared with the corresponding OpenMP software implementations on two different high-end Server systems, with up to 40 threads (Hyper-Threading). The results showed that the FPGA accelerators achieved runtime speedup and are up to 14 times more power efficient.

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