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Performance evaluation of a preloading model in dynamically reconfigurable processors

Papadimitriou Kyprianos, Dollas Apostolos

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URI: http://purl.tuc.gr/dl/dias/BC1F20E3-5B3A-46AD-8C3D-9FB6720D557D
Year 2006
Type of Item Conference Full Paper
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Bibliographic Citation K. Papadimitriou and A. Dollas, "Performance evaluation of a preloading model in dynamically reconfigurable processors," in IEEE International Conference on Field Programmable Logic and Aplications, 2006, pp. 901-904.
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Summary

Dynamic reconfiguration allows for the reuse of the samehardware by different tasks of an application at differentstages of its execution. However, reconfiguring the hardwareat run-time incurs a configuration delay causing performancedegradation of the application. This paper evaluatesa preloading model that hides the configuration overhead.An existing preloading model is augmented accordingto the physical constraints of the system. A reduction of 6%up to 86% in execution time has been obtained with the newmodel.

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