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Conference Publications
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Last Submissions
601-615 out of 1258 results
601
A. Nikitakis, I. Papaefstathiou, D. Bouris, "Fast and Efficient FPGA-Based Feature Detection Employing the SURF Algorithm," in 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010, pp. 3 - 10. doi: 10.1109/FCCM.2010.11
2015-11-15
602
I. Papaefstathiou, D. Mprachos, C. Yannakou, D. Pnevmatikatos. (2007). Rapid System Prototyping of Networking Embedded Systems using System-C. Presented at Parallel and Distributed Computing and Systems. [Online]. Available: file:///C:/Users/%CE%94%CE%B7%CE%BC%CE%AE%CF%84%CF%81%CE%B7%CF%82/Downloads/paper229.pdf
2015-11-15
603
I. Papaefstathiou, D. Pnevmatikatos, I, Mavroidis, "Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem," in 18th IEEE/IFIP International Workshop on Rapid System Prototyping, 2007, pp. 41 - 47. doi: 10.1109/RSP.2007.24
2015-11-15
604
D. Meidanis, I. Papaefstathiou I., "An efficient FPGA-based implementation of Pollard's (rho-1) factorization algorithm," in International Conference: Field-Programmable Technology, 2007. doi: 10.1109/FPT.2007.4439287
2015-11-15
605
I. Papaefstathiou, G. Kornaros, N. Chrysos, "A buffered crossbar-based chip interconnection framework supporting quality of service," in 17th ACM Great Lakes symposium on VLSI, 2007, pp. 90-95 . doi: 10.1145/1228784.1228810
2015-11-15
606
I. Papaefstathiou, D. Pnevmatikatos, I. Mavroidis, "A Fast FPGA-Based 2-Opt Solver for Small-Scale Euclidean Traveling Salesman Problem," in 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2007, pp. 13 - 22. doi: 10.1109/FCCM.2007.40
2015-11-15
607
I. Papaefstathiou, I. Mavroidis, "Efficient Testbench Code Synthesis for a Hardware Emulator System," in Design, Automation and Test in Europe Conference and Exhibition, 2007, pp. 1 - 6. doi: 10.1109/DATE.2007.364405
2015-11-15
608
E. Sotiriades, S. Apostolakis, A. Dollas, P. Karamolegkos, M. Logaras, I. Chatzigiannakis, L. Vasilikiotis,M. Emmanouilidou, S. Aggelidakis, P. Hatzidakis, I. Papaefstathiou, "ROTA: An Archipelago-Wide Area Network for High Speed Communication to Ships," in 16th Panhellenic Conference on Informatics, 2012, pp. 271 - 275. doi: 10.1109/PCi.2012.42
2015-11-15
609
I. Papaefstathiou, A. Brokalakis, "Using hardware-based forward error correction to reduce the overall energy consumption of WSNs," in IEEE Wireless Communications and Networking Conference, 2012, pp. 2191 - 2196. doi: 10.1109/WCNC.2012.6214156
2015-11-15
610
A. Brokalakis, I. Papaefstathiou, G. Chatziparaskevas, "An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes," in Design, Automation and Test in Europe Conference and Exhibition, 2012, pp. 709 - 714. doi: 10.1109/DATE.2012.6176562
2015-11-15
611
G. Chrysos, E. Sotiriades, I. Papaefstathiou and N. Chrysanthou, "Parallel accelerators for GlimmerHMM bioinformatics algorithm," in Design, Automation and Test in Europe Conference and Exhibition, 2011, pp. 1-6. doi: 10.1109/DATE.2011.5763024
2015-11-15
612
G. Mplemenos, K. Papadopoulos, I. Papaefstathiou, A. Brokalakis, "RESENSE: An Innovative, Reconfigurable, Powerful and Energy Efficient WSN Node," in IEEE International Conference on Communications (ICC), 2011, pp. 1 - 5. doi: 10.1109/icc.2011.5963499
2015-11-15
613
K. Georgopoulos, I. Papaefstathiou, D. Meidanis, "FPGA power consumption measurements and estimations under different implementation parameters," in International Conference on Field-Programmable Technology," 2011, pp. 1 - 6, doi:10.1109/FPT.2011.6132694
2015-11-15
614
C. Binding, G. Brettlecker, T. Catarci, S. Christodoulakis, T. Crecelius, N. Gioldasis, H-C. Jetter, M. Kacimi, D. Milano, P. Ranaldi, H. Reiterer, G. Santucci H-J. Schek, H. Schuldt, D. Tudhope and G. Weikum, "DelosDLMS: Infrastructure and Services forFuture Digital Library Systems", presented at 2nd DELOS Conference On Digital Libraries, Tirrenia, Pisa, Italy, 2007.
2015-11-15
615
G. Chrysos, I. Papaefstathiou, A. Dollas, M. Lakka, "Architecture, design, and experimental evaluation of a lightfield descriptor depth buffer algorithm on reconfigurable logic and on a GPU," in IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011, pp. 57-64. doi: 10.1109/FCCM.2011.54
2015-11-15
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