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Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/6046BEE3-CF4C-499F-B956-DB3163DBD5AC | - |
| Identifier | https://doi.org/10.1016/0956-0521(95)00036-4 | - |
| Language | en | - |
| Extent | 8 pages | en |
| Title | Multisplitting iterative methods on fixed-size VLSI architectures | en |
| Creator | Saridakis Ioannis | en |
| Creator | Σαριδακης Ιωαννης | el |
| Creator | Papadopoulou Eleni | en |
| Creator | Παπαδοπουλου Ελενη | el |
| Publisher | Elsevier | en |
| Content Summary | Multisplitting Iterative Methods is a parametrizable family of iterative methods capable of solving Large Linear Systems. They are formed by the proper weighted average of classical (or not) iterative schemes. Hence, they present a second level of inherent parallelism while, at the same time, they take advantage of the parallel hardware to decrease both the computational time and the number of iterations involved in the computation. The increasingly large size of linear systems and the consideration of realistically large, but fixed-size, VLSI architectures, for their solution, motivated this work. We design new fixed size VLSI modules, based on space-time partitioning techniques, to efficiently resolve the problems arising in the computation of an oversized iteration step. | en |
| Type of Item | Peer-Reviewed Journal Publication | en |
| Type of Item | Δημοσίευση σε Περιοδικό με Κριτές | el |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-10-16 | - |
| Date of Publication | 1995 | - |
| Subject | Greek mathematics | en |
| Subject | mathematics greek | en |
| Subject | greek mathematics | en |
| Bibliographic Citation | E. P. Papadopoulou, Y. G. Saridakis, “Multisplitting iterative methods on fixed-size VLSI architectures," Comp. Syst. in Eng. ,vol.6 ,no. 4-5, pp. 477-484, 1995.doi:10.1016/0956-0521(95)00036-4 | en |
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