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Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/891FEAF9-E48E-4E34-9FA0-800F14DF6564 | - |
| Identifier | https://doi.org/10.1080/10637199508915530 | - |
| Language | en | - |
| Extent | 14 pages | en |
| Title | Modular fixed-size vlsi architectures for general multisplitting iteration. | en |
| Creator | Papadopoulou Eleni | en |
| Creator | Παπαδοπουλου Ελενη | el |
| Creator | Saridakis Ioannis | en |
| Creator | Σαριδακης Ιωαννης | el |
| Content Summary | Motivated by the inherent parallelicity of the Multisplitting Iterative Methods, we consider their application for the solution of Large Linear Systems. The realistic parallel implementation of this problem led us to the employment of fixed-size VLSI architectures. Considering the case of General Splitting matrices we combine known as well as we design new VLSI BLAS modules to form fixed-size architectures capable of efficiently carrying out the computations involved in an oversized multisplitting iteration step. For the factorization of the splitting matrices we employ the LU decomposition method while for the organization of the data streams we use space-time partitioning techniques. | en |
| Type of Item | Peer-Reviewed Journal Publication | en |
| Type of Item | Δημοσίευση σε Περιοδικό με Κριτές | el |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-10-16 | - |
| Date of Publication | 1995 | - |
| Subject | Greek mathematics | en |
| Subject | mathematics greek | en |
| Subject | greek mathematics | en |
| Bibliographic Citation | E. P. Papadopoulou and Y. G. Saridakis, “Modular fixed-size VLSI arthitectures for general multisplitting iteration," Par. Algor. and Appl. ,vol.7, no.3-4 ,pp 177-191, 1995.doi:10.1080/10637199508915530 | en |
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