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Explicit communication and synchronization in SARC

Pnevmatikatos Dionysios, Katevenis, Manolis G, Vassilis Papaefstathiou, Stamatis G. Kavadias

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URIhttp://purl.tuc.gr/dl/dias/93B17D95-5562-47F0-8ABD-7ED0146FC7F1-
Identifierhttps://doi.org/10.1109/MM.2010.77-
Languageen-
Extent12 pagesen
TitleExplicit communication and synchronization in SARCen
CreatorPnevmatikatos Dionysiosen
CreatorΠνευματικατος Διονυσιοςel
CreatorKatevenis, Manolis Gen
CreatorVassilis Papaefstathiouen
CreatorStamatis G. Kavadiasen
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryA new network interface optimized for SARC supports synchronization and explicit communication and provides a robust mechanism for event responses. Full-system simulation of the authors' design achieved a 10- to 40-percent speed increase over traditional cache architectures on 64 cores, a two- to four-fold decrease in on-chip network traffic, and a three- to five-fold decrease in lock and barrier latencyen
Type of ItemPeer-Reviewed Journal Publicationen
Type of ItemΔημοσίευση σε Περιοδικό με Κριτέςel
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-10-19-
Date of Publication2010-
SubjectMonitoring of computer networksen
SubjectNetwork monitoring (Computer networks)en
Subjectcomputer networks monitoringen
Subjectmonitoring of computer networksen
Subjectnetwork monitoring computer networksen
Bibliographic CitationM. Katevenis, V. Papaefstathiou, S. G. Kavadias, D. N. Pnevmatikatos, F. Silla, D. S. Nikolopoulos, "Explicit ommunication and synchronization in SARC’’. IEEE Micro, vol. 30, no. 5, pp. 30-41, 2010.10.1109/MM.2010.77en

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