Institutional Repository
Technical University of Crete
Technical University of Crete
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| URI: | http://purl.tuc.gr/dl/dias/7DB9EB3F-8A2F-4A09-94BE-3D86386E207A | ||
| Year | 1998 | ||
| Type of Item | Conference Full Paper | ||
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| Bibliographic Citation | D.Pnevmatikatos, G. Kornaros, G. Kalokerinos, C.Xanthaki.(1998).The Memory structures of ATLAS I, a high performance, 16x16 ATM switch supporting backpressure.Presented at 11th Annual 1998 IEEE International ASIC Conference.[online].Available: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.48.7299&rep=rep1&type=pdf | ||
| Appears in Collections |
We present the overall structure of ATLAS I, emphasizing the memory use and requirements. We categorize these requirements in functionality and bandwidth and present the solutions we used in the first implementation of ATLAS I in a 0.35 CMOS technology. This implementation can serve as a starting point in the design of future switches with functionality similar to ATLAS I.
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