Institutional Repository
Technical University of Crete
Technical University of Crete
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| URI: | http://purl.tuc.gr/dl/dias/E33906EC-4269-456E-AAA4-F110ACCD0179 | ||
| Year | 1999 | ||
| Type of Item | Conference Poster | ||
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| Bibliographic Citation | D.Pnevmatikatos ,Georgios Kornaros, "ATLAS II: Optimizing a 10Gbps single-chip ATM switch,’"in 1999 12th Annual 1999 IEEE Intern. ASIC/SOC Conf. ,doi:10.1109/ASIC.1999.806492 | ||
| Appears in Collections |
We describe ATLAS II, an optimized version of the ATLAS I ATMswitch. While in ATLAS I we concentrated on correctness, in ATLAS II weconcentrate on optimizing the area and the performance of the switch. Toachieve these goals we utilize improved design techniques and circuitry,and we eliminate functionalities of marginal benefit. Our results showthat we can achieve significant performance and cost benefits, requiringonly a small increment in manpower
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