Institutional Repository
Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/E33906EC-4269-456E-AAA4-F110ACCD0179 | - |
| Identifier | 10.1109/ASIC.1999.806492 | - |
| Language | en | - |
| Extent | 5 pages | en |
| Title | ATLAS II: οptimizing a 10Gbps σingle-chip ATM switch | el |
| Creator | Pnevmatikatos Dionysios | en |
| Creator | Πνευματικατος Διονυσιος | el |
| Creator | George Kornaros | en |
| Content Summary | We describe ATLAS II, an optimized version of the ATLAS I ATM switch. While in ATLAS I we concentrated on correctness, in ATLAS II we concentrate on optimizing the area and the performance of the switch. To achieve these goals we utilize improved design techniques and circuitry, and we eliminate functionalities of marginal benefit. Our results show that we can achieve significant performance and cost benefits, requiring only a small increment in manpower | en |
| Type of Item | Αφίσα σε Συνέδριο | el |
| Type of Item | Conference Poster | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-10-19 | - |
| Date of Publication | 1999 | - |
| Bibliographic Citation | D.Pnevmatikatos ,Georgios Kornaros, "ATLAS II: Optimizing a 10Gbps single-chip ATM switch,’"in 1999 12th Annual 1999 IEEE Intern. ASIC/SOC Conf. ,doi:10.1109/ASIC.1999.806492 | en |
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