Institutional Repository
Technical University of Crete
Technical University of Crete
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| URI: | http://purl.tuc.gr/dl/dias/4877CC2E-2FD4-432F-8615-B5C4D2E9A702 | ||
| Year | 2005 | ||
| Type of Item | Conference Poster | ||
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| Bibliographic Citation | I. Sourdis, D. Pnevmatikatos, S. Wong, S.Vassiliadis," A Reconfigurable perfect-hashing scheme for packet inspection,"in 2005 15th Intern. Conf. on Field Program. Logic and Applications (FPL), pp.644 - 647.doi:10.1109/FPL.2005.1515804 https://doi.org/10.1109/FPL.2005.1515804 | ||
| Appears in Collections |
In this paper, we consider scanning and analyzing packets in order to detect hazardous contents using pattern matching. We introduce a hardware perfect-hashing technique to access the memory that contains the matching patterns. A subsequent simple comparison between incoming data and memory output determines the match. We implement our scheme in reconfigurable hardware and show that we can achieve a throughput between 1.7 and 5.7 Gbps requiring only a few tens of FPGA memory blocks and 0.30 to 0.57 logic cells per matching character. We also show that our designs achieve at least 30% better efficiency compared to previous work, measured in throughput per area required per matching character.
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