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Faster: facilitating analysis and synthesis technologies for effectivereconfiguration

Pnevmatikatos Dionysios, Papadimitriou Kyprianos, Becker Tobias, Böhm Peter, Brokalakis Andreas, Bruneel Karel, Ciobanu C., Davidson Tom, Gaydadjiev Georgi, Heyse Karel, Luk W., Niu X. , Papaefstathiou Ioannis, Pau Danilo, Pell Oliver, Pilato Christian, Santambrogio Marco D., Sciuto Donatella, Stroobandt Dirk, Todman Tod, Vansteenkiste Elias

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URIhttp://purl.tuc.gr/dl/dias/69D4ED80-3BF4-4287-803E-994B45B92153-
Identifierhttp://users.isc.tuc.gr/~kpapadimitriou/publications/2014micpro-faster.pdf-
Identifierhttps://doi.org/10.1016/j.micpro.2014.09.006-
Languageen-
TitleFaster: facilitating analysis and synthesis technologies for effective reconfigurationen
CreatorPnevmatikatos Dionysiosen
CreatorΠνευματικατος Διονυσιοςel
CreatorPapadimitriou Kyprianosen
CreatorΠαπαδημητριου Κυπριανοςel
CreatorBecker Tobiasen
CreatorBöhm Peteren
CreatorBrokalakis Andreasen
CreatorΜπροκαλακης Ανδρεαςel
CreatorBruneel Karelen
CreatorCiobanu C.en
CreatorDavidson Tomen
CreatorGaydadjiev Georgien
CreatorHeyse Karelen
CreatorLuk W.en
CreatorNiu X. en
CreatorPapaefstathiou Ioannisen
CreatorΠαπαευσταθιου Ιωαννηςel
CreatorPau Daniloen
CreatorPell Oliveren
CreatorPilato Christianen
CreatorSantambrogio Marco D.en
CreatorSciuto Donatellaen
CreatorStroobandt Dirken
CreatorTodman Toden
CreatorVansteenkiste Eliasen
PublisherElsevieren
Content SummaryThe FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration) EU FP7 project, aims to ease the design and implementation of dynamically changing hardware systems. Our motivation stems from the promise reconfigurable systems hold for achieving high performance and extending product functionality and lifetime via the addition of new features that operate at hardware speed. However, designing a changing hardware system is both challenging and time-consuming. FASTER facilitates the use of reconfigurable technology by providing a complete methodology enabling designers to easily specify, analyze, implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigurable technology. Our tool-chain supports both coarse- and fine-grain FPGA reconfiguration, while during execution a flexible run-time system manages the reconfigurable resources. We target three applications from different domains. We explore the way each application benefits from reconfiguration, and then we asses them and the FASTER tools, in terms of performance, area consumption and accuracy of analysis.en
Type of ItemPeer-Reviewed Journal Publicationen
Type of ItemΔημοσίευση σε Περιοδικό με Κριτέςel
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-11-12-
Date of Publication2015-
SubjectAdaptive computingen
SubjectConfigurable computing systemsen
SubjectReconfigurable computing systemsen
Subjectadaptive computing systemsen
Subjectadaptive computingen
Subjectconfigurable computing systemsen
Subjectreconfigurable computing systemsen
Bibliographic CitationD. Pnevmatikatos, K. Papadimitriou, T. Becker, P. Bohm, A. Brokalakis, K. Bruneel, C. Ciobanu T. Davidson, G. Gaydadjiev, K. Heyse, W. Luk, X. Niu, I. Papaefstathiou, D. Pau, O. Pell, C. Pilato, M.D. Santambrogio, D. Sciuto, D. Stroobandt, T. Todman and E. Vansteenkiste, "FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration", Microprocessors and Microsystems, vol. 39, no. 4-5, pp. 321-338, 2015. doi: 10.1016/j.micpro.2014.09.006en

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