Ιδρυματικό Αποθετήριο
Πολυτεχνείο Κρήτης
Πολυτεχνείο Κρήτης
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| URI | http://purl.tuc.gr/dl/dias/107595D2-EFF8-4F1B-8508-3ED8DCF3B95E | - |
| Αναγνωριστικό | http://users.isc.tuc.gr/~kpapadimitriou/publications/2014wrc-EnabDynRecMidRangeCompPCIe.pdf | - |
| Γλώσσα | en | - |
| Τίτλος | Enabling dynamically reconfigurable technologies in mid range computers through PCI express | en |
| Δημιουργός | Vatsolakis Charalabos | en |
| Δημιουργός | Βατσολακης Χαραλαμπος | el |
| Δημιουργός | Papadimitriou Kyprianos | en |
| Δημιουργός | Παπαδημητριου Κυπριανος | el |
| Δημιουργός | Pnevmatikatos Dionysios | en |
| Δημιουργός | Πνευματικατος Διονυσιος | el |
| Περίληψη | Efficient I/O access is crucial in reconfigurable hardware platforms for implementing high-performance systems. Such platforms can outperform CPUs and GPGPUs in executing applications characterized by inherent parallelism. However, the system-level performance depends heavily on sustaining high transfer rates for feeding data into the reconfigurable hardware and getting the results back to the end-user. In the present work we propose and implement a hybrid system comprising a host computer and an FPGA platform. The latter acts as coprocessor into which hardware accelerators are loaded and executed in a transparent way, i.e. user is not involved in FPGA programming neither controlling its execution. Depending on the user request, the FPGA can be reconfigured either partially or entirely. Initially, we discuss the current state-of-the-art on I/O interfaces attached to FPGAs focusing primarily on the PCI Express (PCIe). Then, we present our system on which we implemented a design for measuring end-to-end throughput. We have developed a simple yet functional interface for serving the communication between software and hardware over PCIe v1.0 bus. At system-level, we achieved a throughput of 544 MBytes/s and 618 MBytes/s for DMA writes and reads respectively, over a PCIe four-lane (x4) connection. This includes all overhead such as communication delays and systems calls for requesting services from the operating system. Our work can be used as the basis for programming and executing hardware accelerators under the control of a run-time system. | en |
| Τύπος | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Τύπος | Conference Full Paper | en |
| Άδεια Χρήσης | http://creativecommons.org/licenses/by/4.0/ | en |
| Ημερομηνία | 2015-11-12 | - |
| Ημερομηνία Δημοσίευσης | 2014 | - |
| Θεματική Κατηγορία | Automatic computers | en |
| Θεματική Κατηγορία | Automatic data processors | en |
| Θεματική Κατηγορία | Computer hardware | en |
| Θεματική Κατηγορία | Computing machines (Computers) | en |
| Θεματική Κατηγορία | Electronic brains | en |
| Θεματική Κατηγορία | Electronic calculating-machines | en |
| Θεματική Κατηγορία | Electronic computers | en |
| Θεματική Κατηγορία | Hardware, Computer | en |
| Θεματική Κατηγορία | computers | en |
| Θεματική Κατηγορία | automatic computers | en |
| Θεματική Κατηγορία | automatic data processors | en |
| Θεματική Κατηγορία | computer hardware | en |
| Θεματική Κατηγορία | computing machines computers | en |
| Θεματική Κατηγορία | electronic brains | en |
| Θεματική Κατηγορία | electronic calculating machines | en |
| Θεματική Κατηγορία | electronic computers | en |
| Θεματική Κατηγορία | hardware computer | en |
| Βιβλιογραφική Αναφορά | C. Vatsolakis, K. Papadimitriou and D. Pnevmatikatos, "Enabling Dynamically Reconfigurable Technologies in Mid Range Computers Through PCI Express", in HiPEAC Workshop on Reconfigurable Computing (WRC), January 2014. | en |
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