Το work with title Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA by Thomas Sotirios, Papadimitriou Kyprianos, Dollas Apostolos is licensed under Creative Commons Attribution 4.0 International
Bibliographic Citation
S. Thomas, K. Papadimitriou and A. Dollas, "Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA," in IFIP/IEEE International Conference on Very Large Scale Integration, 2013. doi: 10.1109/VLSI-SoC.2013.6673273
https://doi.org/10.1109/VLSI-SoC.2013.6673273
Many applications from autonomous vehicles to surveillancecan benefit from real-time 3D stereo vision. In the presentwork we describe a 3D stereo vision design and its implementationthat exploits effectively the resources of a XilinxVirtex-5 FPGA. The post place-and-route design achieved aprocessing rate of 87 frames per sec (fps) for 1920 × 1200resolution. The hardware prototype system was tested andvalidated for several data sets with resolutions up to 400 ×320 and we achieved a processing rate of 1570 fps.