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Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA

Thomas Sotirios, Papadimitriou Kyprianos, Dollas Apostolos

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URIhttp://purl.tuc.gr/dl/dias/80FA236A-1544-44BD-B753-7955D82C0632-
Identifierhttp://users.isc.tuc.gr/~kpapadimitriou/publications/2013vlsisoc-SteroVisionArchitectureRealTime.pdf-
Identifierhttp://ieeexplore.ieee.org/document/6673273/-
Identifierhttps://doi.org/10.1109/VLSI-SoC.2013.6673273-
Languageen-
Extent6 pagesen
TitleArchitecture and implementation of real-time 3D stereo vision on a Xilinx FPGAen
CreatorThomas Sotiriosen
CreatorΘωμας Σωτηριοςel
CreatorPapadimitriou Kyprianosen
CreatorΠαπαδημητριου Κυπριανοςel
CreatorDollas Apostolosen
CreatorΔολλας Αποστολοςel
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryMany applications from autonomous vehicles to surveillance can benefit from real-time 3D stereo vision. In the present work we describe a 3D stereo vision design and its implementation that exploits effectively the resources of a Xilinx Virtex-5 FPGA. The post place-and-route design achieved a processing rate of 87 frames per sec (fps) for 1920 × 1200 resolution. The hardware prototype system was tested and validated for several data sets with resolutions up to 400 × 320 and we achieved a processing rate of 1570 fps.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-11-12-
Date of Publication2013-
Subject3-D imagingen
Subject3D imagingen
SubjectThree-dimensional imaging systemsen
SubjectThree-dimensional imaging techniquesen
SubjectThree-dimensional visualizationen
SubjectVisualization, Three-dimensionalen
Subjectthree dimensional imagingen
Subject3 d imagingen
Subject3d imagingen
Subjectthree dimensional imaging systemsen
Subjectthree dimensional imaging techniquesen
Subjectthree dimensional visualizationen
Subjectvisualization three dimensionalen
Bibliographic CitationS. Thomas, K. Papadimitriou and A. Dollas, "Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA," in IFIP/IEEE International Conference on Very Large Scale Integration, 2013. doi: 10.1109/VLSI-SoC.2013.6673273en

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