Ιδρυματικό Αποθετήριο
Πολυτεχνείο Κρήτης
Πολυτεχνείο Κρήτης
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| URI | http://purl.tuc.gr/dl/dias/2E740457-4C8A-4060-9B99-747E219CA9D6 | - |
| Αναγνωριστικό | http://users.isc.tuc.gr/~kpapadimitriou/publications/2013icicdt-fasterinvited.pdf | - |
| Γλώσσα | en | - |
| Τίτλος | The FASTER vision for designing dynamically reconfigurable systems | en |
| Δημιουργός | Santambrogio Marco D. | en |
| Δημιουργός | Pilato Christian | en |
| Δημιουργός | Pnevmatikatos Dionysios | en |
| Δημιουργός | Πνευματικατος Διονυσιος | el |
| Δημιουργός | Papadimitriou Kyprianos | en |
| Δημιουργός | Παπαδημητριου Κυπριανος | el |
| Δημιουργός | Stroobandt Dirk | en |
| Δημιουργός | Sciuto Donatella | en |
| Εκδότης | Institute of Electrical and Electronics Engineers | en |
| Περίληψη | Extending product functionality and lifetime requires constant addition of new features to satisfy the growing customer needs and the evolving market and technology trends. software component adaptivity is straightforward but not enough: recent products include hardware accelerators for reasons of performance and power efficiency that also need to adapt to new requirements. Reconfigurable logic allows the definition of new functions to be implemented in dynamically instantiated hardware units, combining adaptivity with hardware speed and efficiency. For the Intrusion Detection System example, new rules can be hardcoded into the reconfigurable logic, achieving high performance, while providing the necessary adaptivity to new threats. The FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration) project aims at introducing a complete methodology to allow designers to easily implement a system specification on a platform combining a general purpose processor with multiple accelerators running on an FPGA, taking as input a high-level description and fully exploiting, both at design- and run-time, the capabilities of partial dynamic reconfiguration. The FASTER project will facilitate the use of reconfigurable hardware by providing a complete methodology that enables designers to easily implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigurable technology. | en |
| Τύπος | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Τύπος | Conference Full Paper | en |
| Άδεια Χρήσης | http://creativecommons.org/licenses/by/4.0/ | en |
| Ημερομηνία | 2015-11-12 | - |
| Ημερομηνία Δημοσίευσης | 2013 | - |
| Θεματική Κατηγορία | Adaptive computing | en |
| Θεματική Κατηγορία | Configurable computing systems | en |
| Θεματική Κατηγορία | Reconfigurable computing systems | en |
| Θεματική Κατηγορία | adaptive computing systems | en |
| Θεματική Κατηγορία | adaptive computing | en |
| Θεματική Κατηγορία | configurable computing systems | en |
| Θεματική Κατηγορία | reconfigurable computing systems | en |
| Βιβλιογραφική Αναφορά | M.D. Santambrogio, C. Pilato, D. Pnevmatikatos, K. Papadimitriou, D. Stroobandt and D. Sciuto, "The FASTER Vision for Designing Dynamically Reconfigurable Systems, in IEEE International Conference on IC Design and Technology (ICICDT), May 2013. | en |
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