URI | http://purl.tuc.gr/dl/dias/394343F6-3076-4337-B988-AFD4B156D1AD | - |
Identifier | https://doi.org/10.1109/FCCM.2007.40 | - |
Language | en | - |
Title | A fast FPGA-Based 2-Opt solver for small-scale euclidean traveling salesman problem | en |
Creator | Papaefstathiou Ioannis | en |
Creator | Παπαευσταθιου Ιωαννης | el |
Creator | Pnevmatikatos Dionysios | en |
Creator | Πνευματικατος Διονυσιος | el |
Creator | Mavroidis I. | en |
Publisher | Institute of Electrical and Electronics Engineers | en |
Content Summary | In this paper we discuss and analyze the FPGA-based implementation of an algorithm for the traveling salesman problem (TSP), and in particular of 2-Opt, one of the most famous local optimization algorithms, for Euclidean TSP instances up to a few hundred cities. We introduce the notion of "symmetrical 2-Opt moves" which allows us to uncover fine-grain parallelism when executing the specified algorithm. We propose a novel architecture that exploits this parallelism, and demonstrate its implementation in reconfigurable hardware. We evaluate our proposed architecture and its implementation on a state-of-the-art FPGA using a subset of the TSPLIB benchmark, and find that our approach exhibits better quality of final results and an average speedup of 600% when compared with the state-of-the-art software implementation. Our approach produces, to the best of our knowledge, the fastest to date TSP 2-Opt solver for small-scale Euclidean TSP instances. | en |
Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
Type of Item | Conference Full Paper | en |
License | http://creativecommons.org/licenses/by/4.0/ | en |
Date of Item | 2015-11-15 | - |
Date of Publication | 2007 | - |
Bibliographic Citation | I. Papaefstathiou, D. Pnevmatikatos, I. Mavroidis, "A Fast FPGA-Based 2-Opt Solver for Small-Scale Euclidean Traveling Salesman Problem," in 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2007, pp. 13 - 22. doi: 10.1109/FCCM.2007.40 | en |