Institutional Repository
Technical University of Crete
Technical University of Crete
EN
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EL
| URI | http://purl.tuc.gr/dl/dias/84770ABE-FEE3-4C83-B402-07C0A5B3B61B | - |
| Identifier | https://doi.org/10.1109/DATE.2006.243813 | - |
| Language | en | - |
| Title | A Hardware-Engine for Layer-2 classification in low-storage, ultra-high bandwidth environments | en |
| Creator | Papaefstathiou Ioannis | en |
| Creator | Παπαευσταθιου Ιωαννης | el |
| Creator | Papaefstathiou V. | en |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | Ethernet is the most common layer-2 network protocol, and it is currently being deployed beyond the tight borders of LANs. In order to accommodate the needs of MANs and WANs, several QoS mechanisms employed at the MAC sublayer of Ethernet have been proposed. These QoS mechanisms require identification of network flows and the classification of Ethernet packets according to certain Ethernet header fields. In this paper, we propose a classification engine employed at the MAC sublayer which uses an innovative hashing scheme and internal replacement of MAC vendor IDs; the hash based classification engine (HBCE) compacts the tables containing the rules associated with certain MAC addresses and supports extremely high speed decisions - at a rate of more than 100Gb/sec -, while its memory needs are significantly lower compared to those of the similar schemes currently used. This engine has been implemented in hardware utilizing less than 0.1mm2 in a state of the art CMOS technology. As a result HBCE is a very promising candidate for the next-generation Ethernet equipments that need to support classification at data link layer at multi-gigabit per second network speeds, whereas due to its very low memory requirements and low implementation complexity, it can also be employed very efficiently in lower-bandwidth wireless environments that utilize MAC mechanisms | en |
| Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Full Paper | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-11-16 | - |
| Date of Publication | 2006 | - |
| Bibliographic Citation | I. Papaefstathiou, V. Papaefstathiou, "A Hardware-Engine for Layer-2 classification in low-storage, ultra high bandwidth environments," in Proceedings Design, Automation and Test in Europe, 2006, pp. 1 - 6. doi: 10.1109/DATE.2006.243813 | en |
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