Institutional Repository
Technical University of Crete
Technical University of Crete
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EL
| URI | http://purl.tuc.gr/dl/dias/667D9A41-206E-4CA4-836F-586E305FD662 | - |
| Identifier | https://doi.org/10.1109/ASAP.2003.1212862 | - |
| Language | en | - |
| Title | GFS: An efficient implementation of fair scheduling for multi-gigabit packet networks | en |
| Creator | Papaefstathiou Ioannis | en |
| Creator | Παπαευσταθιου Ιωαννης | el |
| Creator | Kornaros Georgios | en |
| Creator | Κορναρος Γεωργιος | el |
| Creator | Orphanoudakis T. | en |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | In order to address the challenge of providing quality of service guarantees in today's network processing systems, the use of efficient scheduling algorithms is required. The efficiency of a scheduler is determined by several factors including its fairness, capability to operate at high speeds, as well as the resources required for its implementation. We present an architecture to support fair scheduling (gigabit FS) considering variable length packets (i. e. for packet forwarding/switching networks) over gigabit links. This high speed scheduler is designed to manage 32 K flows based on an algorithm that yields efficient implementation in hardware by avoiding the complexity of computing the system virtual time function that many packet fair queueing (PFQ) algorithms have proposed. Further, we demonstrate the critical factors in designing an effective scheduling engine at gigabit rates and we present several enhancements together with their associated cost. | en |
| Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Full Paper | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-11-16 | - |
| Date of Publication | 2003 | - |
| Bibliographic Citation | G. Kornaros, T. Orphanoudakis, I. Papaefstathiou, "GFS: an efficient implementation of fair scheduling for multigigabit packet networks," in 14th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2003), 2003, pp. 389 - 399. doi: 10.1109/ASAP.2003.1212862 | en |
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