Institutional Repository
Technical University of Crete
Technical University of Crete
EN
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EL
| URI | http://purl.tuc.gr/dl/dias/DD287CAF-3D76-44FC-ABF1-56AF35B7CF69 | - |
| Identifier | https://doi.org/10.1142/S0218126604001969 | - |
| Language | en | - |
| Title | Low-level hardware compression for multi-gigabit networks | en |
| Creator | Papaefstathiou Ioannis | en |
| Creator | Παπαευσταθιου Ιωαννης | el |
| Publisher | World Scientific and Engineering Academy and Society | en |
| Content Summary | As it has already been proved, link layer compression is very effective when used in packet networks. In particular, packet compression is especially useful when encryption is applied to the network packets. Encrypting the packets causes the data to be random in nature, and thus no compression can be applied after it. It is believed that low level encryption will be applied to the vast majority of Internet Protocol (IP) networks in the near future, and thus a large number of very sophisticated encryption devices have already been manufactured. Based on these facts, we claim that hardware devices that can compress network streams at link speed (and perform the compression just before the encryption), will also be widely used in the future networks. In this paper, we present such a hardware compressor/decompressor core that can work at speeds up to 10 Gb/s, it is fairly inexpensive and can very easily be plugged into an existing network node without causing any side effects. We additionally examine the performance against complexity tradeoffs of such compressor/decompressor devices. Finally, it is claimed that compression devices with throughput ranging from 0.5 to 10 Gb/s can be efficiently implemented based on the reference architecture. | en |
| Type of Item | Peer-Reviewed Journal Publication | en |
| Type of Item | Δημοσίευση σε Περιοδικό με Κριτές | el |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-11-16 | - |
| Date of Publication | 2004 | - |
| Bibliographic Citation | I. Papaefstathiou, " Low-level Hardware Compression for Multi-Gigabit Networks," Journal of Circuits, Systems and Computers, vol. 13, no. 6, pp. 1307-1319, Dec. 2004. doi: 10.1142/S0218126604001969 | en |
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