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High frequency pulse width modulation implementation using FPGA and CPLD ICs

Koutroulis Eftychios, Dollas Apostolos, Kalaitzakis Kostas

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URIhttp://purl.tuc.gr/dl/dias/9CCC37EC-A00C-414D-BBEA-B18BED02509A-
Identifierhttp://www.sciencedirect.com/science/article/pii/S1383762105001049-
Identifierhttps://doi.org/10.1016/j.sysarc.2005.09.001-
Languageen-
Extent13 pagesen
TitleHigh frequency pulse width modulation implementation using FPGA and CPLD ICsen
CreatorKoutroulis Eftychiosen
CreatorΚουτρουλης Ευτυχιοςel
CreatorDollas Apostolosen
CreatorΔολλας Αποστολοςel
CreatorKalaitzakis Kostasen
CreatorΚαλαϊτζακης Κωσταςel
PublisherElsevieren
Content SummaryPulse width modulation (PWM) has been widely used in power converter control. Most high power level converters operate at switching frequencies up to 500 kHz, while operating frequencies in excess of 1 MHz at high power levels can be achieved using the planar transformer technology. The contribution of this paper is the development of a high-frequency PWM generator architecture for power converter control using FPGA and CPLD ICs. The resulting PWM frequency depends on the target FPGA or CPLD device speed grade and the duty cycle resolution requirements. The post-layout timing simulation results are presented, showing that PWM frequencies up to 3.985 MHz can be produced with a duty cycle resolution of 1.56%. Additionally, experimental results are also presented for low cost functional verification of the proposed architecture.en
Type of ItemPeer-Reviewed Journal Publicationen
Type of ItemΔημοσίευση σε Περιοδικό με Κριτέςel
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-11-17-
Date of Publication2006-
SubjectArchitecture, Softwareen
SubjectComputer software--Architectureen
SubjectComputer software--Designen
SubjectComputer software architectureen
Subjectsoftware architectureen
Subjectarchitecture softwareen
Subjectcomputer software architectureen
Subjectcomputer software designen
Bibliographic CitationE. Koutroulis, K. Kalaitzakis and A. Dollas, "High frequency pulse width modulation implementation using FPGA and CPLD ICs," J. Syst. Architect., vol. 52, no. 6, pp. 332-344, Jun. 2006. doi: 10.1016/j.sysarc.2005.09.001en

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