URI | http://purl.tuc.gr/dl/dias/06E73CB6-5328-485C-9B7B-40E5D4E63782 | - |
Identifier | https://doi.org/10.1109/FPT.2010.5681471 | - |
Identifier | http://ieeexplore.ieee.org/document/5681471/ | - |
Language | en | - |
Extent | 4 pages | en |
Title | CarlOthello: an FPGA-Based Monte Carlo othello player | en |
Creator | Smerdis Miltiadis | en |
Creator | Σμερδης Μιλτιαδης | el |
Creator | Malakonakis Pavlos | en |
Creator | Μαλακωνακης Παυλος | el |
Creator | Dollas Apostolos | en |
Creator | Δολλας Αποστολος | el |
Publisher | Institute of Electrical and Electronics Engineers | en |
Content Summary | In the FPT 2010 International Conference an Othello competition has been announced, based on the popular game and with requirements for implementation of full designs on standardized FPGA platforms. This paper presents in detail the CarlOthello architecture and design, which is heavily pipelined in order to increase the expansion rate of the overall system, reaching a peak of 4×108 expansions per second. The Monte Carlo-based Othello player was fully designed, implemented in hardware, and tested. This design wins every game against the FPT 2010 reference software. | en |
Type of Item | Δημοσίευση σε Συνέδριο | el |
Type of Item | Conference Publication | en |
License | http://creativecommons.org/licenses/by/4.0/ | en |
Date of Item | 2015-11-17 | - |
Date of Publication | 2010 | - |
Subject | Computer software engineering | en |
Subject | software engineering | en |
Subject | computer software engineering | en |
Bibliographic Citation | M. Smerdis, P. Malakonakis and A. Dollas, "CarlOthello: An FPGA-based Monte Carlo Othello player," in International Conference on Field-Programmable Technology, 2010, pp. 515-518. doi: 10.1109/FPT.2010.5681471 | en |