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CarlOthello: an FPGA-Based Monte Carlo othello player

Smerdis Miltiadis, Malakonakis Pavlos, Dollas Apostolos

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URIhttp://purl.tuc.gr/dl/dias/06E73CB6-5328-485C-9B7B-40E5D4E63782-
Identifierhttps://doi.org/10.1109/FPT.2010.5681471-
Identifierhttp://ieeexplore.ieee.org/document/5681471/-
Languageen-
Extent4 pagesen
TitleCarlOthello: an FPGA-Based Monte Carlo othello player en
CreatorSmerdis Miltiadisen
CreatorΣμερδης Μιλτιαδηςel
CreatorMalakonakis Pavlosen
CreatorΜαλακωνακης Παυλοςel
CreatorDollas Apostolosen
CreatorΔολλας Αποστολοςel
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryIn the FPT 2010 International Conference an Othello competition has been announced, based on the popular game and with requirements for implementation of full designs on standardized FPGA platforms. This paper presents in detail the CarlOthello architecture and design, which is heavily pipelined in order to increase the expansion rate of the overall system, reaching a peak of 4×108 expansions per second. The Monte Carlo-based Othello player was fully designed, implemented in hardware, and tested. This design wins every game against the FPT 2010 reference software.en
Type of ItemΔημοσίευση σε Συνέδριοel
Type of ItemConference Publicationen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-11-17-
Date of Publication2010-
SubjectComputer software engineeringen
Subjectsoftware engineeringen
Subjectcomputer software engineeringen
Bibliographic CitationM. Smerdis, P. Malakonakis and A. Dollas, "CarlOthello: An FPGA-based Monte Carlo Othello player," in International Conference on Field-Programmable Technology, 2010, pp. 515-518. doi: 10.1109/FPT.2010.5681471en

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