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Modeling recursion data structures for FPGA-based implementation

Ninos Spyridon, Dollas Apostolos

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URI: http://purl.tuc.gr/dl/dias/AA74171F-9466-47DA-B700-F584A6974AB9
Year 2008
Type of Item Conference Publication
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Bibliographic Citation S. Ninos and A. Dollas, "Modeling recursion data structures for FPGA-based implementation," in International Conference on Field Programmable Logic and Applications, 2008, pp. 11-16. doi: 10.1109/FPL.2008.4629900 https://doi.org/10.1109/FPL.2008.4629900
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Summary

Recursion is a powerful technique used to solve problems with repeating patterns, and is a fundamental structure in software. To date there is no known general way to apply a recursive solution to reconfigurable hardware; it is considered difficult to implement, of low performance and resource-intensive. In this paper we extend previous results on hardware structures for recursion by V. Sklyarov, and we demonstrate that recursion can be efficiently implemented in a general way on FPGAs. We show that our general, non-optimized architecture presents approximately 3 times speedup against optimized software algorithm implementations. It also shows 75% speedup, at least 40% lower area utilization, and at the same time it is simpler, less designer time consuming and more general vs. previously published hardware implementations.

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