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Extended VHDL for the rapid prototyping of systems with synthesizable and nonsynthesizable subsystems

Sterling Babcock J. D. , Dollas Apostolos

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URIhttp://purl.tuc.gr/dl/dias/C8896114-E412-4925-8A58-D15387350A77-
Identifierhttps://doi.org/10.1109/IWRSP.1994.315900-
Identifierhttp://ieeexplore.ieee.org/document/315900/-
Languageen-
Extent7 pagesen
TitleExtended VHDL for the rapid prototyping of systems with synthesizable and nonsynthesizable subsystemsen
CreatorSterling Babcock J. D. en
CreatorDollas Apostolosen
CreatorΔολλας Αποστολοςel
PublisherInstitute of Electrical and Electronics Engineersen
Content SummarySystem design is typically done in VHDL to facilitate top-down design and to enable the mapping of a design to many implementations. Reusability of subsystems to date has largely been performed with libraries of synthesizable VHDL subsystems. This paper presents recommended extensions to VHDL to allow the VHDL designer to interact with nonsynthesizable subsystems while still designing in VHDL. The extended VHDL code is passed through a precompiler that outputs two standard VHDL files: a simulatable VHDL model of the system, and a synthesizable model of the design where subsystems are replaced by signals to the external hardware.en
Type of ItemΔημοσίευση σε Συνέδριοel
Type of ItemConference Publicationen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-11-18-
Date of Publication1994-
SubjectBio-informaticsen
SubjectBiological informaticsen
Subjectbioinformaticsen
Subjectbio informaticsen
Subjectbiological informaticsen
Bibliographic CitationJ. D. Sterling Babcock and A. Dollas, "Extended VHDL for the rapid prototyping of systems with synthesizable and nonsynthesizable subsystems," in Fifth International Workshop on Rapid System Prototyping, 1994, pp. 146-152. doi: 10.1109/IWRSP.1994.315900en

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