Institutional Repository
Technical University of Crete
Technical University of Crete
EN
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| URI: | http://purl.tuc.gr/dl/dias/36BE6880-A296-40B2-9CC2-E4C31ECAC144 | ||
| Year | 2016 | ||
| Type of Item | Diploma Work | ||
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| Bibliographic Citation | Fotios Pegios, "FPGA-based 3D graphics pipeline and advanced rendering effects", Diploma Work, School of Electronic Computer Engineering, Technical University of Crete, Chania, Greece, 2016 https://doi.org/10.26233/heallink.tuc.63331 | ||
| Appears in Collections |
Since their invention by Xilinx in 1984, FPGAs have gone from being simple glue chips to actually replacing custom application-specific integrates circuits (ASICs) and processors for signal processing and real-time applications. As they enhance in speed, size and abilities, FPGA’s are becoming more useful in areas where ASICs were used before. 3D graphics rendering is one such area, where research is underway as to how FPGAs can help to improve the performance of graphics processing units (GPUs) with less energy consumption.In this project we represent an FPGA-based graphics processor for low power applications and three advanced 3D rendering effects, implemented using a hardware description language (VHDL). Approaching such a project, we have the ambition to fully understand how a simple GPU really works in depth and how algorithm are implemented on low-level programming language. On the grounds that this thesis will be available to the programming society, there is promise for future upgrade and expansion.
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