Institutional Repository
Technical University of Crete
Technical University of Crete
EN
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EL
| URI | http://purl.tuc.gr/dl/dias/18705D60-AFEE-471D-9021-78AA46304792 | - |
| Identifier | https://doi.org/10.26233/heallink.tuc.65968 | - |
| Language | en | - |
| Extent | 68 pages | en |
| Title | Σχεδίαση πλατφόρμας βασισμένης σε αναδιατασσόμενη λογική για εξόρυξη δεδομένων από ροές | el |
| Title | Platform based on reconfigurable computing | en |
| Creator | Kritikakis Charalabos | en |
| Creator | Κρητικακης Χαραλαμπος | el |
| Contributor [Thesis Supervisor] | Dollas Apostolos | en |
| Contributor [Thesis Supervisor] | Δολλας Αποστολος | el |
| Contributor [Committee Member] | Garofalakis Minos | en |
| Contributor [Committee Member] | Γαροφαλακης Μινως | el |
| Contributor [Committee Member] | Pnevmatikatos Dionysios | en |
| Contributor [Committee Member] | Πνευματικατος Διονυσιος | el |
| Publisher | Πολυτεχνείο Κρήτης | el |
| Publisher | Technical University of Crete | en |
| Academic Unit | Technical University of Crete::School of Electrical and Computer Engineering | en |
| Academic Unit | Πολυτεχνείο Κρήτης::Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών | el |
| Content Summary | Stream join is one of the most fundamental operations to relate information from different streams. The challenging task is to use systems with memory and run-time constraints in order to store and analyze massive volumes of streaming data. Hence, it is important to maximize the processing which is done on-the-fly as the streaming data arrives. This paper presents an FPGA-based architecture that maps the most performance-efficient stream join algorithm, i.e. ScaleJoin, to reconfigurable logic. The system was fully implemented on a Convey HC-2ex hybrid computer and experimental performance evaluation shows that the proposed system outperforms by up to one order of magnitude the corresponding fully optimized software-based solution running on a high-end 48-core multiprocessor platform, by exploiting the high internal bandwidth of present-day FPGAs. The proposed architecture can be used as a generic template for mapping other stream processing algorithms, taking into consideration real-world challenges. | en |
| Type of Item | Διπλωματική Εργασία | el |
| Type of Item | Diploma Work | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2016-07-14 | - |
| Date of Publication | 2016 | - |
| Subject | FPGA | en |
| Subject | Reconfigurable computing | en |
| Bibliographic Citation | Charalabos Kritikakis, "Platform based on reconfigurable computing", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 2016 | en |
| Bibliographic Citation | Χαράλαμπος Κρητικάκης, "Σχεδίαση πλατφόρμας βασισμένης σε αναδιατασσόμενη λογική για εξόρυξη δεδομένων από ροές", Διπλωματική Εργασία, Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών, Πολυτεχνείο Κρήτης, Χανιά, Ελλάς, 2016 | el |
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