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Implementation of mutual information and transfer entropy algorithms with FPGA-based SuperComputer

Iordanou Konstantinos

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Year 2017
Type of Item Diploma Work
Bibliographic Citation Konstantinos Iordanou, "Implementation of mutual information and transfer entropy algorithms with FPGA-based SuperComputer", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 2017
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It is widely known that contemporary applications are bounded by massive computational demands. With conventional CPUs falling out of favor due to their limitations, the industry of Hybrid-SuperComputers using reconfigurable logic which is a growing field in the area of Computer Systems. This thesis explores the Convey Computer, and more specifically the platform HC-2ex which is a hybrid platform with increased computational capacity as well as a combination of a high-bandwidth memory interface with an architecture featuring multiple levels of computational parallelism. This platform selected in order to efficiently map computationally intensive algorithms in modern hardware. We address two challenging problems within this framework, the first being time-series analysis by focusing on the calculation of the Mutual Information (MI) statistical value and the second being the Transfer Entropy (TE) statistical value between two time-series. The problems of Mutual Information and Transfer Entropy respectively, have been addressed by the research community for low-precision arithmetic applications, but the performance of these algorithms have not been evaluated on platforms like Convey Computer. This is the first work to extensively study of using this platform, by identifying the pros and cons of Convey Computer with computationally intensive algorithms as well as describing how these algorithms can efficiently utilized. In terms of result, Mutual Information and Transfer Entropy implementations compared with implemented architectures on other platforms like Maxeler. Compared to the reference software, the implementation of MI algorithm yielded 13x speedup as well as the implementation of TE yielded 15x speedup for high dimensional data using 32-bit precision arithmetic on Convey HC-2ex.

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