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Analysis of radiation effects in CMOS technology at high Total Ionizing Dose (TID)

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Summary

In the last decade a number of applications in environments with high ionizing radiation have been developed worldwide. Applications span medical technology equipment to space applications and high energy physics experiments such as the Large Hadron Collider (LHC). These have brought many significant scientific achievements that can impact the evolution of mankind. To enable furtherdevelopment, the optimization of electronics in these applications is of great importance.It could be said that this constitutes the springboard of many studies and experiments about high ionizing radiation impact in CMOS technology, which is prevalent in electronic circuit design.This thesis, which attempts to contribute to this field, is related to research by CERN, the European organization of Nuclear Research. It is based on experimental data acquired at CERN, comprising measured electrical characteristics of MOSFETs exposed to X-rays up to very high Total Ionizing Dose (TID). Specific methods for the extraction of electrical parameters of different transistor geometries and under increasing levels of TID have been implemented. These parameters are important for both digital and analog integrated circuit design. A simple modelling approach is proposed to evaluate the high dose effects for different geometries and levels of TID. Evaluations show different impact of high TID on nMOS and pMOS devices. This research provides new insight into geometry-related TID effects in the examined CMOS technology, and the developed models and parameters are shown to be suitable for estimating geometry-dependent TID effects.

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