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Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/9D51E078-620D-412C-A99E-FC6B29A1D90B | - |
| Identifier | https://ieeexplore.ieee.org/document/7577354/ | - |
| Identifier | https://doi.org/10.1109/FPL.2016.7577354 | - |
| Language | en | - |
| Extent | 4 pages | en |
| Title | An FPGA-based high-throughput stream join architecture | en |
| Creator | Kritikakis Charalabos | en |
| Creator | Κρητικακης Χαραλαμπος | el |
| Creator | Chrysos Grigorios | en |
| Creator | Χρυσος Γρηγοριος | el |
| Creator | Dollas Apostolos | en |
| Creator | Δολλας Αποστολος | el |
| Creator | Pnevmatikatos Dionysios | en |
| Creator | Πνευματικατος Διονυσιος | el |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | Stream join is a fundamental operation that combines information from different high-speed and high-volume data streams. This paper presents an FPGA-based architecture that maps the most performance-efficient stream join algorithm, i.e. ScaleJoin, to reconfigurable logic. The system was fully implemented on a Convey HC-2ex hybrid computer and the experimental performance evaluation shows that the proposed system outperforms by up to one order of magnitude the corresponding fully optimized parallel software-based solution running on a high-end 48-core multiprocessor platform. The proposed architecture can be used as a generic template for mapping stream processing algorithms to reconfigurable logic, taking into consideration real-world challenges. | en |
| Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Full Paper | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2018-10-09 | - |
| Date of Publication | 2016 | - |
| Subject | FPGA architecture | en |
| Subject | Join operator | en |
| Subject | ScaleJoin | en |
| Subject | Stream processing | en |
| Bibliographic Citation | C. Kritikakis, G. Chrysos, A. Dollas and D. N. Pnevmatikatos, "An FPGA-based high-throughput stream join architecture," in 26th International Conference on Field-Programmable Logic and Applications, 2016. doi: 10.1109/FPL.2016.7577354 | en |
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