Ιδρυματικό Αποθετήριο
Πολυτεχνείο Κρήτης
Πολυτεχνείο Κρήτης
EN
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EL
| URI: | http://purl.tuc.gr/dl/dias/549A3EB1-38F3-45F2-8009-65ADC308F4B3 | ||
| Έτος | 2018 | ||
| Τύπος | Πλήρης Δημοσίευση σε Συνέδριο | ||
| Άδεια Χρήσης |
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| Βιβλιογραφική Αναφορά | N. Makris, M. Bucher, F. Jazaeri and J. M. Sallese "A compact model for static and dynamic operation of symmetric double-gate junction FETs," in 48th European Solid-State Device Research Conference, pp. 238-241, 2018. doi: 10.1109/ESSDERC.2018.8486848 https://doi.org/10.1109/ESSDERC.2018.8486848 | ||
| Εμφανίζεται στις Συλλογές |
The present work describes a novel charge-based compact model of the symmetric double-gate junction field effect transistor (DG JFET) for circuit simulation. The model is physics-based and addresses static and capacitive behavior of the JFET. The model covers all regions of device operation of the depletion mode JFET, relies only on physical and electrical parameters of the device, and includes short-channel effects. The model is validated with respect to TCAD simulation as well as with respect to measurements from JFETs. The model is implemented in SPICE circuit simulators using Verilog-A based code.
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