Institutional Repository
Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/2190DF60-9231-463F-8E6F-878E8B185832 | - |
| Identifier | https://doi.org/10.1109/TED.2018.2830972 | - |
| Identifier | https://ieeexplore.ieee.org/document/8357582 | - |
| Language | en | - |
| Extent | 5 pages | en |
| Title | Charge-based model for junction FETs | en |
| Creator | Jazaeri, Farzan 1984- | en |
| Creator | Makris Nikolaos | en |
| Creator | Μακρης Νικολαος | el |
| Creator | Saeidi, Ali, 1973- | en |
| Creator | Bucher Matthias | en |
| Creator | Bucher Matthias | el |
| Creator | Sallese, Jean-Michel 1964- | en |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | We present a unified charge-based model for double-gate and cylindrical architectures of junction field-effect transistors (JFETs). The central concept is to consider the JFET as a junctionless FET (JLFET) with an infinitely thin insulating layer, leading to analytical expressions between charge densities, current, and voltages without any fitting parameters. Assessment of the model with numerical technology computer-aided design simulations confirms that holding the JFET as a special case of the JLFET is justified in all the regions of operation, i.e., from deep depletion to flat-band and from linear to saturation. | en |
| Type of Item | Peer-Reviewed Journal Publication | en |
| Type of Item | Δημοσίευση σε Περιοδικό με Κριτές | el |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2019-09-02 | - |
| Date of Publication | 2018 | - |
| Subject | Cylindrical gate all around junction field-effect transistor (JFET) | en |
| Subject | Double-gate FETs | en |
| Subject | Nanowire FETs | en |
| Subject | Power semiconductor FETs | en |
| Subject | Radiation-hard electronics | en |
| Subject | Vertical JFET (V-JFET) | en |
| Bibliographic Citation | F. Jazaeri, N. Makris, A. Saeidi. M. Bucher and J.-M. Sallese, "Charge-based model for junction FETs," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2694-2698, July 2018. doi: 10.1109/TED.2018.2830972 | en |
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