URI | http://purl.tuc.gr/dl/dias/3E0F8C3A-1AEC-4744-BFC1-51E75746F36E | - |
Αναγνωριστικό | https://doi.org/10.1109/TED.2018.2838101 | - |
Αναγνωριστικό | https://ieeexplore.ieee.org/document/8371530 | - |
Γλώσσα | en | - |
Μέγεθος | 7 pages | en |
Τίτλος | Charge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductances | en |
Δημιουργός | Makris Nikolaos | en |
Δημιουργός | Μακρης Νικολαος | el |
Δημιουργός | Jazaeri, Farzan 1984- | en |
Δημιουργός | Sallese, Jean-Michel 1964- | en |
Δημιουργός | Sharma Rupendra Kumar | en |
Δημιουργός | Bucher Matthias | en |
Δημιουργός | Bucher Matthias | el |
Εκδότης | Institute of Electrical and Electronics Engineers | en |
Περίληψη | The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of not only device fabrication but also its operation. The device has been largely used in low-noise applications, but also more recently, in power electronics. Physics-based compact models for JFETs, contrary to MOSFETs, are, however, scarce. In this paper, an analytical, charge-based model is established for the mobile charges, drain current, and transconductances of symmetric DG JFETs, covering all regions of device operation. The model is unified and continuous from subthreshold to linear and saturation operation and is valid over a large temperature range. This charge-based model constitutes the basis of a full compact model of the DG JFET. | en |
Τύπος | Peer-Reviewed Journal Publication | en |
Τύπος | Δημοσίευση σε Περιοδικό με Κριτές | el |
Άδεια Χρήσης | http://creativecommons.org/licenses/by/4.0/ | en |
Ημερομηνία | 2019-09-03 | - |
Ημερομηνία Δημοσίευσης | 2018 | - |
Θεματική Κατηγορία | Analytical model | en |
Θεματική Κατηγορία | Circuit simulation | en |
Θεματική Κατηγορία | Compact model | en |
Θεματική Κατηγορία | JFET | en |
Θεματική Κατηγορία | Junction field-effect transistor | en |
Θεματική Κατηγορία | Temperature effect | en |
Βιβλιογραφική Αναφορά | N. Makris, F. Jazaeri, J.-M. Sallese, R.K. Sharma and M. Bucher, "Charge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductances," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2744-2750, Jul. 2018. doi: 10.1109/TED.2018.2838101 | en |