CMOS technology is the leading technology for integrated circuits manufacturing, offering advantages such as: reliability, low cost, low power consumption. Noise is a critical parameter that affects the operation and behavior of circuits. Proper noise prediction in integrated systems through circuit simulation based on compact models is a very important task given the high cost of building a system. MOSFET's poor noise prediction makes the implementation of integrated circuits particularly difficult, as the lack of understanding of noise is a huge obstacle to proper noise handling. The successful and accurate statistical analysis of a device is a critical process for helping us understand better the cause of noise and how effectively we can deal with it.The present thesis aims to study low-frequency noise in MOSFET devices and circuits, both qualitatively and quantitatively. The aim of the project is to develop a CAD tool in Java that will enable the analytical study of the low frequency noise dispersion of the measurements we receive. At the first level, experimental low frequency noise measurements were performed on transistors of 180nm CMOS technology. Subsequently, the CAD tool is presented and the mean and the statistical distribution of low frequency noise are studied in a range of varying bias conditions.