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Compact modeling of SIC and gan junction FETS at high temperature

Makris Nikolaos, Zekentes, Konstantinos, Bucher Matthias

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URIhttp://purl.tuc.gr/dl/dias/F5C955D4-9356-4680-A972-99DE10D0ECC9-
Identifierhttps://doi.org/10.4028/www.scientific.net/MSF.963.683-
Identifierhttps://www.scientific.net/MSF.963.683-
Languageen-
Extent5 pagesen
TitleCompact modeling of SIC and gan junction FETS at high temperatureen
CreatorMakris Nikolaosen
CreatorΜακρης Νικολαοςel
CreatorZekentes, Konstantinosen
CreatorBucher Matthiasen
CreatorBucher Matthiasel
PublisherTrans Tech Publicationsen
Content SummaryHigh temperatures and other harsh environments are domains of predilection for Junction FETs, particularly when wide band-gap semiconductors such as SiC or GaN are used. The present work describes the new compact model of double-gate (DG) JFETs which is compared to TCAD simulations of SiC and GaN JFETs over a wide temperature range up to 500ºC. The compact model is shown to be predictive of device behavior, for static (current-voltage) as well as dynamic (capacitance-voltage) behavior of long-channel DG JFETs.en
Type of ItemPeer-Reviewed Journal Publicationen
Type of ItemΔημοσίευση σε Περιοδικό με Κριτέςel
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2020-10-27-
Date of Publication2019-
SubjectCapacitancesen
SubjectCompact modelen
SubjectGallium Nitrideen
SubjectHigh temperatureen
SubjectJFETen
SubjectJunction FETen
SubjectOn resistanceen
SubjectParameter extractionen
SubjectSilicon Carbideen
SubjectWide-bandgapen
Bibliographic CitationN. Makris, K. Zekentes and M. Bucher, “Compact modeling of SiC and GaN junction FETs at high temperature,” Mater. Sci. Forum, vol. 963, pp. 683–687, Jul. 2019. https://doi.org/10.4028/www.scientific.net/msf.963.683en

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