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Mapping the spectral algorithm to reconfigurable logic using DAE and memory HMC

Iatrakis Petros-Pavlos

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Summary

In the latest years, the need to process large volumes of data in a short time period has shifted the interest in creating programs that combine software and hardware. This need led Phil Colela to the inspiration of seven algorithmic methods with great portability on various platforms that were used as benchmarks, exploiting the advantages of parallel programming. These methods were extended to thirteen by a Berkeley group of researchers.Simultaneously, in the past few years, the visualization of an algorithm in hardware has been simplified with the help of the Vivado High Level Synthesis tool. As a result, procedures have become more automated and the creation of the RTL file has become easier for the developer, as well.The aim of this diploma is to display a dwarf, specifically the Spectral algorithm,on hardware with the help of the vivado HLS platform, then based on the Decoupled Access/Execute architecture we tried to optimized the specific algorithm. This framework converts the original instruction stream into two units, the fetch, which is responsible for retrieving data from memory, and the process, which in turn is responsible for processing data. For the Spectral algorithm we created four different implementations which were carried out on the Vivado HLS tool, and another one implementation in the HMC platform which Technical University of Crete provide us. Finally, a comparison was made in the performance of each implementation with the original optimized implementation in software. The results we obtained we quite encouraging, i.e., about 2 times higher efficiency in terms of using the DAE architecture and about 4 times higher efficiency in terms of using the micron platform, HMC.

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