Institutional Repository
Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/9F6CCDED-8F17-4D23-89E9-F86717C3BA32 | - |
| Identifier | https://doi.org/10.26233/heallink.tuc.95117 | - |
| Language | en | - |
| Extent | 5.1 megabytes | en |
| Extent | 176 pages | en |
| Title | Compression of weights of recurrent neural network for speech recognition acceleration in reconfigurable hardware (FPGA) | en |
| Title | Συμπίεση βαρών αναδρομικού νευρωνικού δικτύου για την επιτάχυνση αναγνώρισης ωωνής σε αναδιατασσόμενη λογική (FPGA) | el |
| Creator | Poupakis Alexandros | en |
| Creator | Πουπακης Αλεξανδρος | el |
| Contributor [Thesis Supervisor] | Dollas Apostolos | en |
| Contributor [Thesis Supervisor] | Δολλας Αποστολος | el |
| Contributor [Committee Member] | Bletsas Aggelos | en |
| Contributor [Committee Member] | Μπλετσας Αγγελος | el |
| Contributor [Committee Member] | Lagoudakis Michail | en |
| Contributor [Committee Member] | Λαγουδακης Μιχαηλ | el |
| Publisher | Πολυτεχνείο Κρήτης | el |
| Publisher | Technical University of Crete | en |
| Academic Unit | Technical University of Crete::School of Electrical and Computer Engineering | en |
| Academic Unit | Πολυτεχνείο Κρήτης::Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών | el |
| Content Summary | Over the last decades, advances in machine learning and neural networks have been unprecedented, with ever more sophisticated models trickling down the mainstream and forming the backbone of products and services we use every day. While cutting edge research in this field has expanded the realm of what is feasible, the learning superiority of deep neural networks is largely attributed to their size. Hardware acceleration of deep learning inference is necessary, for such models to be practically deployable. However, as model size increases rapidly, the available memory bandwidth on massively parallel computing platforms such as FPGAs is outpaced, constituting a bottleneck for scalability. This study addresses the problem of compressing deep neural network weights for inference acceleration on FPGAs. The DeepSpeech2 model for Speech Recognition is trained and used as a case study for weight pruning and quantization. The pièce de résistance of this thesis is the development of a novel compression method suitable for quantized weights, which is tested on the sparse matrices of DeepSpeech2. This method generates a tree of overlapping symbol sequences and uses it to encode the data with mathematically decodable, variable length codes. Importantly, our compression method inherently allows one to coarsely select the decompression throughput. Lastly, the decompressor's architecture is designed and a general model for its resource cost in UltraScale FPGAs is created. When compared against various LZ77-based decompressors in literature, our decompressor consumes more than an order of magnitude fewer logic resources, while being capable of the same or higher throughput. | en |
| Type of Item | Διπλωματική Εργασία | el |
| Type of Item | Diploma Work | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2023-03-01 | - |
| Date of Publication | 2023 | - |
| Subject | FPGA | en |
| Subject | Reconfigurable logic | en |
| Subject | Compression | en |
| Subject | Inference acceleration | en |
| Subject | Neural networks | en |
| Bibliographic Citation | Alexandros Poupakis, "Compression of weights of recurrent neural network for speech recognition acceleration in reconfigurable hardware (FPGA)", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 2023 | en |
| Bibliographic Citation | Αλέξανδρος Πουπάκης, "Συμπίεση βαρών αναδρομικού νευρωνικού δικτύου για την επιτάχυνση αναγνώρισης ωωνής σε αναδιατασσόμενη λογική (FPGA)", Διπλωματική Εργασία, Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών, Πολυτεχνείο Κρήτης, Χανιά, Ελλάς, 2023 | el |
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