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Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/5D384994-1041-45D8-A702-8EB40283773F | - |
| Identifier | https://doi.org/10.1109/IPDPS.2006.1639443 | - |
| Identifier | http://ieeexplore.ieee.org/document/1639443/ | - |
| Language | en | - |
| Title | FPGA based architecture for DNA sequence comparison and database search | en |
| Creator | Sotiriadis Evripidis | en |
| Creator | Σωτηριαδης Ευριπιδης | el |
| Creator | Kozanitis Christos | en |
| Creator | Dollas Apostolos | en |
| Creator | Δολλας Αποστολος | el |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | DNA sequence comparison is a computationally intensive problem, known widely since the competition for human DNA decryption. Database search for DNA sequence comparison is of great value to computational biologists. Several algorithms have been developed and implemented to solve this problem efficiently, but from a user base point of view the BLAST algorithm is the most widely used one. In this paper, we present a new architecture for the BLAST algorithm. The new architecture was fully designed, placed and routed. The post place-and-route cycle-accurate simulation, accounting for the I/O, shows a better performance than a cluster of workstations running highly optimized code over identical datasets. The new architecture and detailed performance results are presented in this paper. | en |
| Type of Item | Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Publication | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2015-11-17 | - |
| Date of Publication | 2006 | - |
| Subject | Field programmable logic arrays | en |
| Subject | FPGAs | en |
| Subject | field programmable gate arrays | en |
| Subject | field programmable logic arrays | en |
| Subject | fpgas | en |
| Bibliographic Citation | E. Sotiriades, C. Kozanitis and A. Dollas, "FPGA based architecture for DNA sequence comparison and database search," in 20th International Parallel and Distributed Processing Symposium, 2006. doi: 10.1109/IPDPS.2006.1639443 | en |
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