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Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/B47663B8-7DCC-4DDD-9680-2973E8D9E282 | - |
| Identifier | https://ieeexplore.ieee.org/document/7731785/ | - |
| Identifier | https://doi.org/10.1109/ELMAR.2016.7731785 | - |
| Language | en | - |
| Extent | 5 pages | en |
| Title | An evaluation of vivado HLS for efficient system design | en |
| Creator | Georgopoulos Konstantinos | en |
| Creator | Γεωργοπουλος Κωνσταντινος | el |
| Creator | Chrysos Grigorios | en |
| Creator | Χρυσος Γρηγοριος | el |
| Creator | Malakonakis Pavlos | en |
| Creator | Μαλακωνακης Παυλος | el |
| Creator | Tampouratzis Nikolaos | en |
| Creator | Ταμπουρατζης Νικολαος | el |
| Creator | Dollas Apostolos | en |
| Creator | Δολλας Αποστολος | el |
| Creator | Pnevmatikatos Dionysios | en |
| Creator | Πνευματικατος Διονυσιος | el |
| Creator | Papaefstathiou Ioannis | en |
| Creator | Παπαευσταθιου Ιωαννης | el |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | High-Level Synthesis (HLS) tools are hailed as one of the most promising ways to bridge the design productivity gap, especially for reconfigurable systems. These tools increase designer productivity at a possible performance and/or silicon cost, although the designer can play a significant role in the minimisation of both. Currently, one of the key challenges for the designer is to efficiently use the vendor-defined methodology and the design guidelines of the HLS tool. Hence, this work aims at assisting designers in taking full advantage and making optimal use of the official HLS methodology when implementing three fundamental algorithms used in a variety of video and image processing applications. One is a sorting algorithm while the other two are algorithms used in traversing tree/graph data structures. The work presented here concerns a highly popular HLS tool, namely Vivado HLS, and the experiences and analysis of the authors helps in the efficient use of the toolset, which can significantly increase design productivity when compared to the naive datasheet-based approach; the performance of all the resulting synthesisable models is also provided for completeness. | en |
| Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Full Paper | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2018-06-28 | - |
| Date of Publication | 2016 | - |
| Subject | Data structures | en |
| Subject | Field-programmable gate array | en |
| Subject | High-level synthesis | en |
| Subject | Reconfigurable computing | en |
| Bibliographic Citation | K. Georgopoulos, G. Chrysos, P. Malakonakis, A. Nikitakis, N. Tampouratzis, A. Dollas, D. Pnevmatikatos and Y. Papaefstathiou, "An evaluation of vivado HLS for efficient system design" in 58th International Symposium ELMAR, 2016, pp. 195-199. doi: 10.1109/ELMAR.2016.7731785 | en |
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