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An FPGA-based high-throughput stream join architecture

Kritikakis Charalabos, Chrysos Grigorios, Dollas Apostolos, Pnevmatikatos Dionysios

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URIhttp://purl.tuc.gr/dl/dias/9D51E078-620D-412C-A99E-FC6B29A1D90B-
Identifierhttps://ieeexplore.ieee.org/document/7577354/-
Identifierhttps://doi.org/10.1109/FPL.2016.7577354-
Languageen-
Extent4 pagesen
TitleAn FPGA-based high-throughput stream join architectureen
CreatorKritikakis Charalabosen
CreatorΚρητικακης Χαραλαμποςel
CreatorChrysos Grigoriosen
CreatorΧρυσος Γρηγοριοςel
CreatorDollas Apostolosen
CreatorΔολλας Αποστολοςel
CreatorPnevmatikatos Dionysiosen
CreatorΠνευματικατος Διονυσιοςel
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryStream join is a fundamental operation that combines information from different high-speed and high-volume data streams. This paper presents an FPGA-based architecture that maps the most performance-efficient stream join algorithm, i.e. ScaleJoin, to reconfigurable logic. The system was fully implemented on a Convey HC-2ex hybrid computer and the experimental performance evaluation shows that the proposed system outperforms by up to one order of magnitude the corresponding fully optimized parallel software-based solution running on a high-end 48-core multiprocessor platform. The proposed architecture can be used as a generic template for mapping stream processing algorithms to reconfigurable logic, taking into consideration real-world challenges.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2018-10-09-
Date of Publication2016-
SubjectFPGA architectureen
SubjectJoin operatoren
SubjectScaleJoinen
SubjectStream processingen
Bibliographic CitationC. Kritikakis, G. Chrysos, A. Dollas and D. N. Pnevmatikatos, "An FPGA-based high-throughput stream join architecture," in 26th International Conference on Field-Programmable Logic and Applications, 2016. doi: 10.1109/FPL.2016.7577354en

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