Institutional Repository
Technical University of Crete
Technical University of Crete
EN
|
EL
| URI: | http://purl.tuc.gr/dl/dias/851161F8-08B3-4261-9E85-D94B3FE6B1F4 | ||
| Year | 2017 | ||
| Type of Item | Peer-Reviewed Journal Publication | ||
| License |
|
||
| Bibliographic Citation | A. Papadimitriou and M. Bucher, "Multi-objective low-noise amplifier optimization using analytical model and genetic computation," Circuits, Syst. Signal Process., vol.36, no.12, pp. 4963-4993, Dec. 2017. doi:10.1007/s00034-017-0634-2 https://doi.org/10.1007/s00034-017-0634-2 | ||
| Appears in Collections |
The purpose of this paper is to introduce a methodology for multi-objective radio frequency (RF) low-noise amplifier (LNA) optimization using an analytical model of the MOS transistor in combination with genetic computation. The optimum performance is defined by a figure of merit (FoM) that considers both the power efficiency and the RF performance of the system. Using a short-channel EKV model, the analysis of this FoM suggests that the optimum MOS inversion level lies in the moderate inversion. This knowledge can be used as a strong starting point for the design and optimization procedures. Initially, the LNA component values are extracted using the analytical model. The model does not fully take into consideration the parasitic behaviour of the components in a real design; thus, it produces an approximation of the optimum design. The final circuit fine tuning is achieved with the use of a genetic algorithm that takes advantage of the aforementioned approximation as an initialization aiming at faster convergence. To demonstrate the effectiveness and the operation of this methodology, a 5 GHz common source LNA with inductive degeneration has been designed using the proposed design and optimization methodology. The same design has been statistically investigated using Monte Carlo simulations to address process variability as well as temperature and supply voltage variations. Finally, the optimization procedure is demonstrated also on different topologies including cascode or common gate structures, as well as multi-stage distributed and resistive shunt feedback amplifiers.
Copyright © DIAS 2013
